It can be appreciated that digital data is transferred across different domains in many applications. In a cellular telephone, for example, digital data my be quickly transferred back and forth many times between a processor and different types of memory within the cellular telephone, such as dynamic random access memory (DRAM) and FLASH memory, such as erasable programmable read only memory (EPROM) and electrically erasable programmable read only memory (EEPROM), for example.
When such data is transferred between and around different domains, different busses are used for the different transfers. In a cellular telephone, for example, respective memory buses are used for DRAM and FLASH memory, for example. It can be appreciated that having multiple busses takes up valuable semiconductor (and other) real estate within the cellular telephone, as well as in other similar handheld digital devices, as layout and routing designs are more complex and pin counts (which facilitate bus interconnections) are higher.
Additionally, different domains generally have arbitrary phase relationships, which is essentially a function of different clocks (or clock signals) being implemented in the different domains. Accordingly, circuitry or schemes are commonly implemented to synchronize data transfers. In particular, synchronization circuits are generally used on the clock domain that is receiving the data. Flip flops (FF) are commonly used to implement such synchronization schemes or circuitry. However, registers in the flip flops generally add a clock delay of the respective clocks that the flip flops are operating on. This can translate into significant delays in data transmissions. Additionally, the synchronization circuitry and flip flops occupy more valuable space.
Accordingly, since reducing the size and increasing the speed and capabilities of handheld digital devices is an ongoing desire in the electronics industry, a scheme that facilitates synchronized data transmissions while allowing flip flops (and the delays associated therewith) to be reduced, and that further conserves valuable real estate, such as by allowing different busses to be combined and pin counts to be reduced, for example, would therefore be desirable.